Draw the state diagram for a circuit that outputs a "1" if the aggregate serial binary input is divisible by 5. For instance, if the input stream is 1, 0, 1, we output a "1" (since 101 is 5). If we then get a "0", the aggregate total is 10, sowe output another "1" (and so on).
Answer:
The number is divided by 5 , it doesn't matter if it's 25 or 0. We need to keep tracks of "0" to "4"
2) How to design a divided by 2 clock and divided by 3 clock with 50% duty cycles? Answer: The divided by 2 clock is as following:
The divided by 3 clock with 50% duty cycle is as following:
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